{"id":1270,"date":"2026-05-09T09:09:31","date_gmt":"2026-05-09T01:09:31","guid":{"rendered":"https:\/\/www.ndnlab.com\/?p=1270"},"modified":"2026-05-09T09:09:33","modified_gmt":"2026-05-09T01:09:33","slug":"ceio-a-cache-efficient-network-1-o-architecture-for-nic-cpu-data-paths","status":"publish","type":"post","link":"https:\/\/www.ndnlab.com\/?p=1270","title":{"rendered":"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths"},"content":{"rendered":"\n<p><strong>1. \u6458\u8981\u4e0e\u6838\u5fc3\u8d21\u732e<\/strong> \u6458\u8981\u6e05\u6670\u6307\u51fa\uff0c\u968f\u7740\u7f51\u7edc\u94fe\u8def\u901f\u5ea6\u6269\u5c55\u81f3 100Gbps \u4e43\u81f3\u66f4\u9ad8\uff0c\u4f20\u7edf I\/O \u52a0\u901f\u6280\u672f\uff08\u5982 Intel \u7684 DDIO \u548c RDMA\uff09\u7531\u4e8e LLC \u5229\u7528\u7387\u4f4e\u800c\u6027\u80fd\u53d7\u9650\u3002CEIO \u7684\u6838\u5fc3\u521b\u65b0\u5728\u4e8e\uff1a\u5728 NIC \u5165\u53e3\u5904\u90e8\u7f72 I\/O \u7ba1\u7406\u5668\uff0c\u901a\u8fc7\u4fe1\u7528-based \u4e3b\u52a8\u6d41\u63a7\u5236\u5c06 I\/O \u901f\u7387\u9650\u5236\u5728 LLC \u5bb9\u91cf\u4e4b\u5185\uff0c\u540c\u65f6\u5229\u7528 SmartNIC \u677f\u8f7d\u5185\u5b58\u8fdb\u884c\u5f39\u6027\u7f13\u51b2\uff0c\u907f\u514d\u4e22\u5305\u548c\u7f51\u7edc\u62e5\u585e\u63a7\u5236\uff08CCA\uff09\u88ab\u610f\u5916\u89e6\u53d1\u3002\u4f5c\u8005\u5f3a\u8c03\uff0cCEIO \u4e0d\u4ec5\u89e3\u51b3\u4e86\u73b0\u6709\u65b9\u6848\uff08HostCC \u7684\u53cd\u5e94\u5f0f\u63a7\u5236\u548c ShRing \u7684\u56fa\u5b9a\u7f13\u51b2\uff09\u7684\u6162\u54cd\u5e94\u4e0e\u4e22\u5305\u95ee\u9898\uff0c\u8fd8\u901a\u8fc7\u4f18\u5148\u4fdd\u969c CPU-involved \u6d41\u8d70\u5feb\u901f\u8def\u5f84\uff08NIC\u2192LLC\u2192CPU\/DRAM\uff09\u3001CPU-bypass \u6d41\u8d70\u6162\u8def\u5f84\uff08NIC\u2192on-NIC Memory\u2192CPU\/DRAM\uff09\u7684\u65b9\u5f0f\uff0c\u5b9e\u73b0\u4e86 LLC \u96f6\u7f3a\u5931\u4e0b\u7684\u7ebf\u901f\u541e\u5410\u548c\u5fae\u79d2\u7ea7\u5c3e\u5ef6\u8fdf\u3002\u5b9e\u9a8c\u5728 200Gbps \u771f\u5b9e\u73af\u5883\u4e2d\u9a8c\u8bc1\u4e86\u8fd9\u4e9b\u4f18\u52bf\uff0c\u5145\u5206\u8bc1\u660e\u4e86 CEIO \u5728\u52a8\u6001\u6d41\u91cf\u5206\u5e03\u548c\u7f51\u7edc\u7a81\u53d1\u573a\u666f\u4e0b\u7684\u9c81\u68d2\u6027\u3002<\/p>\n\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"621\" height=\"297\" src=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/1-6.png\"  class=\"wp-image-1272\" srcset=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/1-6.png 621w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/1-6-300x143.png 300w\" sizes=\"auto, (max-width: 621px) 100vw, 621px\" title=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe\" alt=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe\" \/><\/figure>\n<\/div>\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"606\" height=\"501\" src=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/2-4.png\"  class=\"wp-image-1273\" srcset=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/2-4.png 606w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/2-4-300x248.png 300w\" sizes=\"auto, (max-width: 606px) 100vw, 606px\" title=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe1\" alt=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe1\" \/><\/figure>\n<\/div>\n\n\n<p><strong>2. \u5f15\u8a00\u4e0e\u7814\u7a76\u52a8\u673a<\/strong> \u5f15\u8a00\u90e8\u5206\u8be6\u7ec6\u63cf\u8ff0\u4e86\u7f51\u7edc I\/O \u7cfb\u7edf\u5728\u6570\u636e\u4e2d\u5fc3\u4e2d\u7684\u6838\u5fc3\u5730\u4f4d\uff1aNIC \u6536\u5305\u540e\u9700\u7ecf DMA \u5199\u5165\u4e3b\u673a\u5185\u5b58\uff0c\u518d\u7531 CPU \u5b8c\u6210\u534f\u8bae\u5904\u7406\u548c payload \u5904\u7406\u3002\u968f\u7740\u5e26\u5bbd\u6fc0\u589e\uff0cCPU \u6210\u4e3a\u74f6\u9888\uff0cDDIO\uff08\u8ba9\u6570\u636e\u76f4\u5199 LLC\uff09\u548c RDMA\uff08\u65c1\u8def CPU\uff09\u867d\u80fd\u52a0\u901f\uff0c\u4f46 LLC \u5bb9\u91cf\u6709\u9650\uff08\u901a\u5e38\u6570\u5341 MB\uff09\u4e14\u88ab\u591a\u6838\u3001\u591a\u4e2a NIC \u5171\u4eab\uff0c\u4e00\u65e6 in-flight \u6570\u636e\u91cf\u8d85\u8fc7 LLC \u5bb9\u91cf\uff0c\u5c31\u4f1a\u4ea7\u751f\u5927\u91cf LLC \u7f3a\u5931\uff0c\u5bfc\u81f4 CPU \u989d\u5916\u4ece DRAM \u53d6\u6570\uff0c\u5ef6\u8fdf\u9aa4\u589e\u81f3 100ns \u4ee5\u4e0a\uff0c\u541e\u5410\u91cf\u548c\u591a\u6838\u5e76\u884c\u6548\u7387\u5927\u5e45\u4e0b\u964d\u3002\u4f5c\u8005\u901a\u8fc7 200Gbps\u30011024B \u5305\u7684\u4f8b\u5b50\u91cf\u5316\u8bf4\u660e\uff1a\u6bcf\u4e2a I\/O \u64cd\u4f5c\u5fc5\u987b\u5728 41.8ns \u5185\u5b8c\u6210\uff0c\u4efb\u4f55 LLC \u7f3a\u5931\u90fd\u4f1a\u6253\u7834\u7ebf\u901f\u8981\u6c42\u3002\u73b0\u6709\u5de5\u4f5c\u5206\u4e3a\u201c\u9650\u901f\u7387\u201d\uff08HostCC \u53cd\u5e94\u5f0f\u964d DMA \u7387\uff09\u548c\u201c\u9650\u5bb9\u91cf\u201d\uff08ShRing \u56fa\u5b9a\u7f13\u51b2\u5c0f\u4e8e LLC\uff09\uff0c\u4f46\u5747\u56e0\u6162\u54cd\u5e94\u6216\u9891\u7e41\u89e6\u53d1 CCA \u800c\u5728\u5b9e\u9645\u52a8\u6001\u573a\u666f\u4e0b\u6027\u80fd\u9000\u5316\u9ad8\u8fbe 1.9 \u500d\u3002\u8fd9\u76f4\u63a5\u5f15\u51fa CEIO \u7684\u6838\u5fc3\u6d1e\u89c1\uff1a\u5728 NIC \u5165\u53e3\u5b9e\u73b0\u4e3b\u52a8\u4fe1\u7528\u63a7\u5236 + \u5f39\u6027\u7f13\u51b2\uff0c\u4ece\u800c\u5728 LLC \u6ea2\u51fa\u524d\u5c31\u7cbe\u51c6\u8c03\u63a7 I\/O \u901f\u7387\uff0c\u540c\u65f6\u907f\u514d\u4e22\u5305\u3002<\/p>\n\n\n\n<p><strong>3. \u80cc\u666f\u77e5\u8bc6\u4e0e\u73b0\u6709\u65b9\u6848\u5c40\u9650\u6027<\/strong> \u7b2c 2 \u8282\u7cfb\u7edf\u68b3\u7406\u4e86\u7f51\u7edc I\/O \u6570\u636e\u8def\u5f84\uff08\u56fe 2\uff09\u3001DDIO \u4e0e RDMA \u7684\u52a0\u901f\u539f\u7406\uff08\u56fe 3\uff09\u4ee5\u53ca LLC \u7ba1\u7406\u7684\u5fc5\u8981\u6027\u3002\u4f5c\u8005\u5c06 I\/O \u6d41\u5206\u4e3a CPU-involved\uff08DDIO \u52a0\u901f\uff09\u548c CPU-bypass\uff08RDMA \u65c1\u8def\uff09\u4e24\u7c7b\uff0c\u4e24\u8005\u5747\u4f9d\u8d56 LLC\uff0c\u4f46\u5171\u4eab\u5bfc\u81f4\u51b2\u7a81\u3002\u73b0\u6709\u65b9\u6848\u4e2d\uff0cHostCC \u4f9d\u8d56 IIO \u7f13\u51b2\u5360\u7528\u4fe1\u53f7\u53cd\u5e94\u5f0f\u964d\u901f\uff0c\u5bb9\u6613\u5728 LLC \u7f3a\u5931\u5df2\u53d1\u751f\u540e\u624d\u89e6\u53d1\uff0c\u5bfc\u81f4\u6162 I\/O \u5904\u7406\uff1bShRing \u5219\u56fa\u5b9a\u7f13\u51b2\u5927\u5c0f\u4ee5\u6d88\u9664\u7f3a\u5931\uff0c\u5374\u9891\u7e41\u56e0\u7f13\u51b2\u6ee1\u800c\u89e6\u53d1 DCTCP \u7b49 CCA\uff0c\u9020\u6210\u7f51\u7edc\u53d1\u9001\u901f\u7387\u4e0d\u7a33\u5b9a\u3002\u4f5c\u8005\u5728 200Gbps \u53cc\u673a\u73af\u5883\u4e0b\u7528 eRPC\uff08CPU-involved\uff09\u548c LineFS\uff08CPU-bypass\uff09\u8fdb\u884c\u52a8\u6001\u6d41\u91cf\u5207\u6362\u4e0e\u7f51\u7edc\u7a81\u53d1\u5b9e\u9a8c\uff08\u56fe 4\uff09\uff0c\u91cf\u5316\u8bc1\u660e\u4e24\u8005\u6027\u80fd\u8fdc\u4f4e\u4e8e\u201c\u65e0\u9650 LLC\u201d\u9884\u671f\uff0c\u6700\u9ad8\u9000\u5316 1.9 \u500d\u3002\u8868 1 \u5bf9\u6bd4\u6e05\u6670\u663e\u793a\uff1aCEIO \u901a\u8fc7\u4e3b\u52a8\u63a7\u5236 + \u5f39\u6027\u7f13\u51b2\uff0c\u5b8c\u7f8e\u89c4\u907f\u4e86\u4e0a\u8ff0\u4e24\u5927\u6839\u672c\u5c40\u9650\uff0c\u4e3a\u540e\u7eed\u8bbe\u8ba1\u5960\u5b9a\u57fa\u7840\u3002<\/p>\n\n\n\n<p><strong>4. CEIO \u67b6\u6784\u6982\u8ff0<\/strong> \u7b2c 3 \u8282\u7ed9\u51fa CEIO \u9ad8\u5c42\u8bbe\u8ba1\uff08\u56fe 5\uff09\u3002\u6838\u5fc3\u662f\u5728 SmartNIC \u4e0a\u90e8\u7f72 I\/O \u7ba1\u7406\u5668\uff1a\uff081\uff09\u4fe1\u7528-based \u6d41\u63a7\u5236\u2014\u2014\u6240\u6709\u6d41\u5728 DMA \u524d\u7533\u8bf7\u4fe1\u7528\uff0c\u603b\u4fe1\u7528\u7b49\u4e8e LLC \u5bb9\u91cf\uff08\u516c\u5f0f 1\uff09\uff0c\u4fe1\u7528\u8017\u5c3d\u540e\u81ea\u52a8\u5207\u6362\u81f3 on-NIC \u7f13\u51b2\uff1b\uff082\uff09\u5f39\u6027\u7f13\u51b2\u2014\u2014\u8d85\u8fc7 LLC \u5bb9\u91cf\u7684\u5305\u6682\u5b58\u4e8e SmartNIC DRAM\uff0c\u907f\u514d\u4e22\u5305\u548c CCA \u89e6\u53d1\u3002CEIO \u5c06\u6570\u636e\u8def\u5f84\u5206\u4e3a\u5feb\u901f\u8def\u5f84\uff08\u96f6\u7f3a\u5931\uff09\u548c\u6162\u8def\u5f84\uff08\u989d\u5916 PCIe \u5ef6\u8fdf\uff09\uff0c\u5e76\u901a\u8fc7\u4e24\u4e2a\u5173\u952e\u6311\u6218\u89e3\u51b3\u673a\u5236\u786e\u4fdd\u6027\u80fd\uff1a\u4e00\u662f\u4fe1\u7528\u5206\u914d\u7b56\u7565\u4f18\u5148\u4fdd\u969c CPU-involved \u6d41\u8d70\u5feb\u901f\u8def\u5f84\uff1b\u4e8c\u662f\u5f39\u6027\u7f13\u51b2\u7ba1\u7406\u5668\u5b9e\u73b0\u987a\u5e8f\u4fdd\u8bc1\u4e0e\u5f02\u6b65 DMA\uff0c\u6d88\u9664\u91cd\u6392\u5e8f\u548c\u540c\u6b65\u5f00\u9500\u3002\u6574\u4f53\u67b6\u6784\u5b8c\u5168\u517c\u5bb9\u73b0\u6709 DPDK\/RDMA \u5e93\uff0c\u4ec5\u9700\u66ff\u6362\u5c11\u91cf recv() \u8c03\u7528\u5373\u53ef\u900f\u660e\u4f7f\u7528\u3002<\/p>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"578\" src=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/3-4-1024x578.png\"  class=\"wp-image-1274\" srcset=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/3-4-1024x578.png 1024w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/3-4-300x169.png 300w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/3-4-768x433.png 768w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/3-4.png 1281w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" title=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe2\" alt=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe2\" \/><\/figure>\n\n\n\n<p><strong>5. CEIO \u8be6\u7ec6\u8bbe\u8ba1<\/strong> \u7b2c 4 \u8282\u662f\u8bba\u6587\u6280\u672f\u6838\u5fc3\uff0c\u5206\u4e3a\u4e24\u5927\u6a21\u5757\u3002 <strong>4.1 \u4e3b\u52a8\u4fe1\u7528-based \u6d41\u63a7\u5236<\/strong>\uff1a\u4f5c\u8005\u6452\u5f03\u4f20\u7edf\u591a\u4f18\u5148\u7ea7\u961f\u5217\uff0c\u8f6c\u800c\u91c7\u7528\u201c\u61d2\u4fe1\u7528\u91ca\u653e\u201d\u673a\u5236\u2014\u2014\u4ec5\u5728\u6279\u91cf\u6d88\u606f\u5904\u7406\u5b8c\u6210\u540e\u624d\u5f52\u8fd8\u4fe1\u7528\u3002CPU-involved \u6d41\u56e0\u8f6e\u8be2\u9ad8\u6548\u3001\u5904\u7406\u5feb\u800c\u5feb\u901f\u5f52\u8fd8\u4fe1\u7528\uff0cCPU-bypass \u6d41\uff08\u5927\u6d88\u606f\uff09\u5219\u56e0 RDMA Write-with-immediate \u4fe1\u53f7\u540e\u624d\u91ca\u653e\u800c\u5feb\u901f\u8017\u5c3d\u4fe1\u7528\uff0c\u81ea\u7136\u5b9e\u73b0\u201cCPU-involved \u4f18\u5148\u5feb\u901f\u8def\u5f84\u201d\u3002\u4fe1\u7528\u5206\u914d\u91c7\u7528 Algorithm 1\uff0c\u5728\u65b0\u6d41\u5230\u8fbe\u65f6\u6309\u6bd4\u4f8b\u5747\u5300\u91cd\u5206\u914d\uff0c\u5e76\u901a\u8fc7\u6b20\u8d26\u673a\u5236\uff08I \u96c6\u5408\uff09\u4fdd\u8bc1\u516c\u5e73\u6027\u3002\u540c\u65f6\u5f15\u5165\u201c\u6d3b\u8dc3\u6d41\u201d\u7b56\u7565 + \u8f6e\u8be2\u8c03\u5ea6\uff0c\u56de\u6536\u4e0d\u6d3b\u8dc3\u6d41\u4fe1\u7528\uff0c\u5b9e\u73b0\u6570\u5343\u6d41\u89c4\u6a21\u4e0b\u7684\u9ad8\u6548\u6269\u5c55\u3002 <strong>4.2 \u5f39\u6027\u7f13\u51b2<\/strong>\uff1a\u8bbe\u8ba1 SW Ring\uff08\u8f6f\u4ef6\u73af\uff09\u7edf\u4e00\u5feb\/\u6162\u8def\u5f84\u786c\u4ef6\u73af\uff0c\u4fdd\u8bc1\u5305\u5e8f\uff08\u76f8\u4f4d\u4e92\u65a5 + \u6307\u9488\u4ea4\u66ff\u66f4\u65b0\uff09\uff1b\u5f02\u6b65 DMA\uff08async_recv() API\uff09\u5141\u8bb8\u5e94\u7528\u5728\u5904\u7406\u5feb\u901f\u8def\u5f84\u5305\u7684\u540c\u65f6\uff0c\u9a71\u52a8\u7a0b\u5e8f\u540e\u53f0\u53d1\u8d77\u6162\u8def\u5f84 DMA\uff0c\u6d88\u9664 CPU \u963b\u585e\u3002\u56fe 7 \u7528\u5177\u4f53\u4f8b\u5b50\u751f\u52a8\u5c55\u793a\u4e86\u5f39\u6027\u7f13\u51b2\u7684\u6709\u5e8f\u3001\u5f02\u6b65\u5de5\u4f5c\u6d41\u7a0b\u3002<\/p>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"171\" src=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/4-6-1024x171.png\"  class=\"wp-image-1275\" srcset=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/4-6-1024x171.png 1024w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/4-6-300x50.png 300w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/4-6-768x128.png 768w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/4-6.png 1296w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" title=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe3\" alt=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe3\" \/><\/figure>\n\n\n<div class=\"wp-block-image\">\n<figure class=\"aligncenter size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"620\" height=\"285\" src=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/5-3.png\"  class=\"wp-image-1276\" srcset=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/5-3.png 620w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/5-3-300x138.png 300w\" sizes=\"auto, (max-width: 620px) 100vw, 620px\" title=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe4\" alt=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe4\" \/><\/figure>\n<\/div>\n\n\n<p><strong>6. \u5b9e\u73b0\u7ec6\u8282<\/strong> \u7b2c 5 \u8282\u8be6\u7ec6\u8bf4\u660e\u4e86 CEIO \u5728 NVIDIA BlueField-3 DPU \u4e0a\u7684\u5b8c\u6574\u5b9e\u73b0\u3002CEIO \u5e93\u57fa\u4e8e DOCA SDK\u3001DPDK \u548c MLNX_OFED \u6784\u5efa\uff0c\u5411\u4e0a\u66b4\u9732 recv() \/ async_recv() \/ post_recv() \u7b49 socket-like API\uff0c\u5411\u4e0b\u5229\u7528 RMT \u5f15\u64ce\u5b9e\u73b0\u6d41\u8868\u5339\u914d\u4e0e DMA \u8f6c\u5411\uff0c\u5229\u7528 ARM \u6838\u8fd0\u884c\u4fe1\u7528\u63a7\u5236\u5668\u548c\u7f13\u51b2\u7ba1\u7406\u5668\u3002\u5b9e\u73b0\u5b8c\u5168\u900f\u660e\uff1a\u4e0a\u5c42\u5e94\u7528\uff08\u5982 gRPC\u3001eRPC\u3001LineFS\uff09\u53ea\u9700\u66ff\u6362\u5c11\u91cf I\/O \u8c03\u7528\uff0c\u65e0\u9700\u4fee\u6539\u4f20\u8f93\u534f\u8bae\u6216\u5185\u6838\u6808\uff1b\u786c\u4ef6\u4f9d\u8d56\u4ec5\u4e3a\u5e38\u89c1 SmartNIC \u7279\u6027\uff08RMT + \u677f\u8f7d DRAM\uff09\uff0c\u6781\u6613\u79fb\u690d\u81f3\u5176\u4ed6\u5382\u5546 NIC\u3002\u4f5c\u8005\u8fd8\u7279\u522b\u5f3a\u8c03\u96f6\u62f7\u8d1d\u652f\u6301\u548c\u6162\u8def\u5f84\u4f18\u5316\uff0c\u786e\u4fdd\u517c\u5bb9\u6027\u4e0e\u9ad8\u6027\u80fd\u517c\u5f97\u3002<\/p>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"293\" src=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/6-1-1024x293.png\"  class=\"wp-image-1277\" srcset=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/6-1-1024x293.png 1024w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/6-1-300x86.png 300w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/6-1-768x220.png 768w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/6-1.png 1248w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" title=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe5\" alt=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe5\" \/><\/figure>\n\n\n\n<p><strong>7. \u5b9e\u9a8c\u8bc4\u4f30<\/strong> \u7b2c 6 \u8282\u901a\u8fc7\u771f\u5b9e\u5de5\u4f5c\u8d1f\u8f7d\uff08eRPC \u952e\u503c\u5b58\u50a8 + LineFS \u6587\u4ef6\u7cfb\u7edf\uff09\u5728 200Gbps \u73af\u5883\u4e0b\u5168\u9762\u9a8c\u8bc1 CEIO\u3002<\/p>\n\n\n\n<ul class=\"wp-block-list\">\n<li><strong>\u7aef\u5230\u7aef\u6027\u80fd<\/strong>\uff08\u56fe 9-10\u3001\u8868 2\uff09\uff1aCEIO \u5c06 LLC \u7f3a\u5931\u7387\u4ece 88% \u964d\u81f3 1%\uff0c\u541e\u5410\u91cf\u8f83 baseline \u63d0\u5347 1.3-2.1\u00d7\u3001\u8f83 HostCC\/ShRing \u63d0\u5347\u6700\u9ad8 2.9\u00d7\uff0cP99.9 \u5ef6\u8fdf\u964d\u4f4e\u6700\u9ad8 4.73\u00d7\uff0c\u52a8\u6001\u6d41\u91cf\u4e0e\u7f51\u7edc\u7a81\u53d1\u573a\u666f\u4f18\u52bf\u66f4\u660e\u663e\u3002<\/li>\n\n\n\n<li><strong>\u5fae\u89c2\u884c\u4e3a<\/strong>\uff08\u56fe 11-12\u3001\u8868 3-4\uff09\uff1a\u5feb\u901f\u8def\u5f84\u5f00\u9500\u53ef\u5ffd\u7565\uff0c\u6162\u8def\u5f84\u5728\u5927\u6d88\u606f\u4e0b\u6027\u80fd\u63a5\u8fd1\u5feb\u901f\u8def\u5f84\uff1b\u6570\u5343\u6d41\u573a\u666f\u4e0b\u6d3b\u8dc3\u6d41\u7b56\u7565\u4ecd\u4fdd\u6301\u9ad8\u541e\u5410\uff1b\u6df7\u5408\u6d41\u4e2d\u4fe1\u7528\u91cd\u5206\u914d + \u5f02\u6b65\u673a\u5236\u8fdb\u4e00\u6b65\u63d0\u5347 CPU-involved \u6d41\u6027\u80fd\u3002<\/li>\n\n\n\n<li><strong>\u5c40\u9650\u573a\u666f<\/strong>\uff1a\u5c0f\u5185\u5b58\u538b\u529b\u6216\u8d85\u5927\u5305\u65f6 LLC \u4e0d\u518d\u662f\u74f6\u9888\uff0cCEIO \u6536\u76ca\u6709\u9650\u3002 \u4f5c\u8005\u8fd8\u63d0\u70bc\u4e86\u4e09\u6761\u91cd\u8981\u7ecf\u9a8c\uff1a\u96f6\u62f7\u8d1d\u5bf9\u91ca\u653e CEIO \u6f5c\u529b\u81f3\u5173\u91cd\u8981\u3001\u6162\u8def\u5f84\u5728\u5c0f\u5305\u591a\u6d41\u65f6\u4ecd\u6709\u4f18\u5316\u7a7a\u95f4\u3001CEIO \u4e0e\u4f20\u8f93\u5c42 CCA \u4e92\u8865\u5171\u5b58\u3002<\/li>\n<\/ul>\n\n\n\n<figure class=\"wp-block-image size-full\"><img loading=\"lazy\" decoding=\"async\" width=\"644\" height=\"926\" src=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/7-4.png\"  class=\"wp-image-1278\" srcset=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/7-4.png 644w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/7-4-209x300.png 209w\" sizes=\"auto, (max-width: 644px) 100vw, 644px\" title=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe6\" alt=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe6\" \/><\/figure>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"550\" src=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/8-3-1024x550.png\"  class=\"wp-image-1279\" srcset=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/8-3-1024x550.png 1024w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/8-3-300x161.png 300w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/8-3-768x412.png 768w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/8-3.png 1302w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" title=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe7\" alt=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe7\" \/><\/figure>\n\n\n\n<figure class=\"wp-block-image size-large\"><img loading=\"lazy\" decoding=\"async\" width=\"1024\" height=\"457\" src=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/9-2-1024x457.png\"  class=\"wp-image-1280\" srcset=\"https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/9-2-1024x457.png 1024w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/9-2-300x134.png 300w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/9-2-768x343.png 768w, https:\/\/www.ndnlab.com\/wp-content\/uploads\/2026\/04\/9-2.png 1278w\" sizes=\"auto, (max-width: 1024px) 100vw, 1024px\" title=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe8\" alt=\"CEIO: A Cache-Efficient Network 1\/O Architecture for NIC-CPU Data Paths\u63d2\u56fe8\" \/><\/figure>\n\n\n\n<p><strong>8. \u76f8\u5173\u5de5\u4f5c\u4e0e\u7ed3\u8bba<\/strong> \u7b2c 7 \u8282\u5c06 CEIO \u4e0e\u8f6f\u4ef6\u7ea7\uff08PacketMill\u3001Shenango\uff09\u3001\u786c\u4ef6\u7ea7\uff08LLC \u6269\u5bb9\u3001DDIO \u91cd\u5206\u914d\uff09\u4ee5\u53ca\u65b0\u578b I\/O \u52a0\u901f\u5668\uff08Enso\u3001SRNIC\uff09\u5bf9\u6bd4\uff0c\u5f3a\u8c03 CEIO \u7684\u6b63\u4ea4\u6027\u548c\u53ef\u7ec4\u5408\u6027\u3002\u7b2c 8 \u8282\u7ed3\u8bba\u91cd\u7533\uff1aCEIO \u901a\u8fc7 NIC \u5165\u53e3\u7684\u4e3b\u52a8\u63a7\u5236\u4e0e\u5f39\u6027\u7f13\u51b2\uff0c\u5f7b\u5e95\u89e3\u51b3\u4e86 LLC \u4f4e\u6548\u95ee\u9898\uff0c\u5728\u5546\u54c1 SmartNIC \u4e0a\u5b9e\u73b0\u8fd1\u7ebf\u901f\u3001\u5fae\u79d2\u7ea7 I\/O\uff0c\u4e3a\u672a\u6765\u7f51\u7edc\u5e93\u548c NIC \u786c\u4ef6\u8bbe\u8ba1\u63d0\u4f9b\u4e86\u91cd\u8981\u6307\u5bfc\u3002\u81f4\u8c22\u90e8\u5206\u611f\u8c22\u5ba1\u7a3f\u4eba\u4e0e shepherd\uff0c\u5e76\u5217\u51fa\u8d44\u52a9\u6765\u6e90\u3002<\/p>\n\n\n\n<p><\/p>\n","protected":false},"excerpt":{"rendered":"<p>1. \u6458\u8981\u4e0e\u6838\u5fc3\u8d21\u732e \u6458\u8981\u6e05\u6670\u6307\u51fa\uff0c\u968f\u7740\u7f51\u7edc\u94fe\u8def\u901f\u5ea6\u6269\u5c55\u81f3 100Gbps \u4e43\u81f3\u66f4\u9ad8\uff0c\u4f20\u7edf I\/O \u52a0\u901f\u6280\u672f\uff08\u5982 Intel \u7684 DDIO \u548c RDMA\uff09\u7531\u4e8e LLC \u5229\u7528\u7387\u4f4e\u800c\u6027\u80fd\u53d7\u9650\u3002CEIO \u7684\u6838\u5fc3\u521b\u65b0\u5728\u4e8e\uff1a\u5728 NIC \u5165\u53e3\u5904\u90e8\u7f72 I\/O \u7ba1\u7406\u5668\uff0c\u901a\u8fc7\u4fe1\u7528-based \u4e3b\u52a8\u6d41\u63a7\u5236\u5c06 I\/O \u901f\u7387\u9650\u5236\u5728 LLC \u5bb9\u91cf\u4e4b\u5185\uff0c\u540c\u65f6\u5229\u7528 SmartNIC \u677f\u8f7d\u5185\u5b58\u8fdb\u884c\u5f39\u6027\u7f13\u51b2\uff0c\u907f\u514d\u4e22\u5305\u548c\u7f51\u7edc\u62e5\u585e\u63a7\u5236\uff08CCA\uff09\u88ab\u610f\u5916\u89e6\u53d1\u3002\u4f5c\u8005\u5f3a\u8c03\uff0cCEIO \u4e0d\u4ec5\u89e3\u51b3\u4e86\u73b0\u6709\u65b9\u6848\uff08HostCC \u7684\u53cd &hellip; <a href=\"https:\/\/www.ndnlab.com\/?p=1270\">\u7ee7\u7eed\u9605\u8bfb <span class=\"meta-nav\">&rarr;<\/span><\/a><\/p>\n","protected":false},"author":5,"featured_media":1281,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[23,24],"tags":[13],"class_list":["post-1270","post","type-post","status-publish","format-standard","has-post-thumbnail","hentry","category-23","category-24","tag-13"],"_links":{"self":[{"href":"https:\/\/www.ndnlab.com\/index.php?rest_route=\/wp\/v2\/posts\/1270","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.ndnlab.com\/index.php?rest_route=\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.ndnlab.com\/index.php?rest_route=\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.ndnlab.com\/index.php?rest_route=\/wp\/v2\/users\/5"}],"replies":[{"embeddable":true,"href":"https:\/\/www.ndnlab.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcomments&post=1270"}],"version-history":[{"count":1,"href":"https:\/\/www.ndnlab.com\/index.php?rest_route=\/wp\/v2\/posts\/1270\/revisions"}],"predecessor-version":[{"id":1282,"href":"https:\/\/www.ndnlab.com\/index.php?rest_route=\/wp\/v2\/posts\/1270\/revisions\/1282"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.ndnlab.com\/index.php?rest_route=\/wp\/v2\/media\/1281"}],"wp:attachment":[{"href":"https:\/\/www.ndnlab.com\/index.php?rest_route=%2Fwp%2Fv2%2Fmedia&parent=1270"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.ndnlab.com\/index.php?rest_route=%2Fwp%2Fv2%2Fcategories&post=1270"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.ndnlab.com\/index.php?rest_route=%2Fwp%2Fv2%2Ftags&post=1270"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}